- 专利标题: Control of length in gate region during processing of VFET structures
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申请号: US15662526申请日: 2017-07-28
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公开(公告)号: US10461196B2公开(公告)日: 2019-10-29
- 发明人: Chanro Park , Steven Bentley , Ruilong Xie , Min Gyu Sung
- 申请人: GLOBALFOUNDRIES Inc.
- 申请人地址: KY Grand Cayman
- 专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人地址: KY Grand Cayman
- 代理机构: Hoffman Warnick LLC
- 代理商 Anthony Canale
- 主分类号: H01L29/786
- IPC分类号: H01L29/786 ; H01L21/84 ; H01L27/12 ; H01L29/423 ; H01L29/66 ; H01L29/78
摘要:
Forming a vertical FinFET includes forming a semiconductor fin on a substrate and having a fin mask on an upper surface thereof; laterally recessing the semiconductor fin causing the fin mask; forming a conformal gate liner on the recessed semiconductor fin and the fin mask, wherein the conformal gate liner includes a first portion surrounding the fin mask and a second portion surrounding the recessed fins and being separated from the fin mask by a thickness of the conformal gate liner; forming a gate mask laterally adjacent to the second portion of the conformal gate liner; removing the first portion of the conformal gate liner; removing the gate mask to expose a remaining second portion of the conformal gate liner; and forming a gate contact to the second portion of the conformal gate liner, the remaining second portion of the conformal gate liner defines the gate length.
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