In one embodiment, a memory control process of a device receives a plurality of program/erase (P/E) requests for a flash memory of the device. The memory control process then stores data associated with the plurality of P/E requests in a random access memory (RAM) of the device, and aggregates the plurality of P/E requests into a single P/E operation. The memory control process may then send the single P/E operation to the flash memory at a given interval to update the flash memory with the data stored in the RAM.