Invention Grant
- Patent Title: Methods and circuits for controlling and/or reducing current leakage during a low-power or inactive mode
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Application No.: US15969204Application Date: 2018-05-02
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Publication No.: US10509426B2Publication Date: 2019-12-17
- Inventor: Sriram Ganesan , Amit Kumar Singh , Nilanjan Pal , Nitish Kuttan
- Applicant: Analog Devices Global Unlimited Company
- Applicant Address: BM Hamilton
- Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
- Current Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
- Current Assignee Address: BM Hamilton
- Agency: Patent Capital Group
- Main IPC: G05F1/46
- IPC: G05F1/46 ; G01R19/00 ; G11C11/417

Abstract:
Methods, systems and circuits for controlling the power available to the load, by reducing the power available to the load, and additionally or alternatively, limiting the current available by pre-establishing a maximum reference current. The reference current is compared to the actual or estimated current drawn by the load or part of the load. The comparison result is used to control a device or switch which disconnects the power supply or power supply regulator, whether connected directly to the load or connected via voltage dropping device, to one or more or a plurality of the load blocks when the maximum current is exceeded.
Public/Granted literature
- US20190339727A1 METHODS AND CIRCUITS FOR CONTROLLING AND/OR REDUCING CURRENT LEAKAGE DURING A LOW-POWER OR INACTIVE MODE Public/Granted day:2019-11-07
Information query
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