- 专利标题: Error correction circuit, operating method thereof and data storage device including the same
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申请号: US15909021申请日: 2018-03-01
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公开(公告)号: US10511334B2公开(公告)日: 2019-12-17
- 发明人: Jang Seob Kim
- 申请人: SK hynix Inc.
- 申请人地址: KR Gyeonggi-do
- 专利权人: SK hynix Inc.
- 当前专利权人: SK hynix Inc.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: IP & T Group LLP
- 优先权: KR10-2017-0105027 20170818
- 主分类号: H03M13/45
- IPC分类号: H03M13/45 ; H03M13/29 ; G06F11/10 ; G11C29/52
摘要:
An error correction circuit includes a control unit configured to receive a data chunk including data blocks, each of the data blocks being included in corresponding codewords of first and second directions; and a decoder configured to perform a decoding operation for a codeword selected by the control unit. The control unit selects a first codeword among codewords selected in the data chunk, and provides the first codeword to the decoder by performing a flip operation in a first data block included in the first codeword. The control unit selects a second codeword among the selected codewords, and provides the second codeword to the decoder by performing a flip operation in a second data block included in the second codeword. When a decoding operation for the first codeword fails, the control unit selects the second data block to be included in different codewords from the first data block.
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