Invention Grant
- Patent Title: Offset voltage compensation
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Application No.: US15836318Application Date: 2017-12-08
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Publication No.: US10520556B2Publication Date: 2019-12-31
- Inventor: Juergen Zimmer
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Schiff Hardin LLP
- Main IPC: G01R33/09
- IPC: G01R33/09 ; G01R33/00

Abstract:
A bridge circuit having a full-bridge circuit having a first branch and a second branch coupled in parallel, the first branch comprising a first half-bridge circuit and a first tunnel magnetoresistance (TMR) resistor cascade coupled in series, and the second branch comprising a second half-bridge circuit and a second TMR resistor cascade coupled in series, wherein the full-bridge circuit has an offset voltage of zero or substantially close to zero.
Public/Granted literature
- US20180100900A1 OFFSET VOLTAGE COMPENSATION Public/Granted day:2018-04-12
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