Invention Grant
- Patent Title: Methods of fabricating semiconductor devices
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Application No.: US16237948Application Date: 2019-01-02
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Publication No.: US10522401B2Publication Date: 2019-12-31
- Inventor: Sungwoo Myung , GeumJung Seong , Jisoo Oh , JinWook Lee , Dohyoung Kim , Yong-Ho Jeon
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2016-0004335 20160113
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/768 ; H01L29/78 ; H01L23/535 ; H01L29/66

Abstract:
A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.
Public/Granted literature
- US20190157147A1 METHODS OF FABRICATING SEMICONDUCTOR DEVICES Public/Granted day:2019-05-23
Information query
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