Invention Grant
- Patent Title: Method for manufacturing electronic package
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Application No.: US15980255Application Date: 2018-05-15
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Publication No.: US10522500B2Publication Date: 2019-12-31
- Inventor: Yu-Min Lo , Chee-Key Chung , Chang-Fu Lin , Kuo-Hua Yu , Hsiang-Hua Huang
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW107105530A 20180214
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50 ; H01L23/00
Abstract:
The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.
Public/Granted literature
- US20190252344A1 METHOD FOR MANUFACTURING ELECTRONIC PACKAGE Public/Granted day:2019-08-15
Information query
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