Invention Grant
- Patent Title: Connector with a housing and one or more groups of contacts for a computing system
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Application No.: US15807519Application Date: 2017-11-08
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Publication No.: US10530077B2Publication Date: 2020-01-07
- Inventor: Jawad B. Khan , Jorge Ulises Martinez Araiza , Michael D. Nelson
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01R12/00
- IPC: H01R12/00 ; H05K1/00 ; H01R12/70 ; H01R12/72 ; H05K7/14 ; H01R43/20 ; H01R13/26

Abstract:
Embodiments of the present disclosure are directed towards a connector for a memory device in a computing system. In one embodiment, the connector includes a housing having a cavity to receive a mating end of a printed circuit board (PCB). The cavity includes first groups of first contacts arranged along an inside wall of the cavity, to engage with respective second groups of second contacts arranged around the mating end of the PCB. The cavity further includes a bar disposed inside the cavity to bridge the cavity, to receive a notch formed on the mating end of the PCB. A depth of the notch defines a number of the first groups of first contacts to be engaged with a respective number of the second groups of second contacts on the mating end of the PCB.
Public/Granted literature
- US20190044259A1 CONNECTOR FOR A MEMORY DEVICE IN A COMPUTING SYSTEM Public/Granted day:2019-02-07
Information query