Invention Grant
- Patent Title: FinFET SCR with SCR implant under anode and cathode junctions
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Application No.: US15899102Application Date: 2018-02-19
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Publication No.: US10535762B2Publication Date: 2020-01-14
- Inventor: Mayank Shrivastava , Milova Paul , Harald Gossner
- Applicant: Indian Institute of Science
- Applicant Address: IN Karnataka, Bangalore
- Assignee: INDIAN INSTITUTE OF SCIENCE
- Current Assignee: INDIAN INSTITUTE OF SCIENCE
- Current Assignee Address: IN Karnataka, Bangalore
- Agency: Michael Best & Friedrich LLP
- Priority: IN201741006746 20170225
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L27/02 ; H01L29/06 ; H01L29/08 ; H01L29/66 ; H01L29/45 ; H01L29/78 ; H01L21/285

Abstract:
SCRs are a must for ESD protection in low voltage—high speed I/O as well as ESD protection of RF pads due to least parasitic loading and smallest foot print offered by SCRs. However, conventionally designed SCRs in FinFET and Nanowire technology suffer from very high turn-on and holding voltage. This issue becomes more severe in sub-14 nm non-planar technologies and cannot be handled by conventional approaches like diode- or transient-turn-on techniques. Proposed invention discloses SCR concept for FinFET and Nanowire technology with diffused junction profiles with sub-3V trigger and holding voltage for efficient and robust ESD protection. Besides low trigger and holding voltage, the proposed device offers a 3 times better ESD robustness per unit area.
Public/Granted literature
- US20180248025A1 FINFET SCR WITH SCR IMPLANT UNDER ANODE AND CATHODE JUNCTIONS Public/Granted day:2018-08-30
Information query
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