Invention Grant
- Patent Title: Cache-coherent multiprocessor system and a method for detecting failures in a cache-coherent multiprocessor system
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Application No.: US14445237Application Date: 2014-07-29
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Publication No.: US10540284B2Publication Date: 2020-01-21
- Inventor: Dirk Wendel , Oliver Bibel , Joachim Fader , Wilhard Christophorus Von Wendorff
- Applicant: Dirk Wendel , Oliver Bibel , Joachim Fader , Wilhard Christophorus Von Wendorff
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G06F12/0831
- IPC: G06F12/0831 ; G06F12/14 ; G06F12/084 ; G06F12/0811

Abstract:
A cache-coherent multiprocessor system comprising processing units, a shared memory resource accessible by the processing units, the shared memory resource being divided into at least one shared region, at least one first region, and at least one second region, a first cache, a second cache, a coherency unit, and a monitor unit, wherein the monitor unit is adapted to generate an error signal, when the coherency unit affects the at least one first region due to a memory access from the second processing unit and/or when the coherency unit affects the at least one second region due to a memory access from the first processing unit, and a method for detecting failures in a such a cache-coherent multiprocessor system.
Public/Granted literature
Information query
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