A timing adjuster shifts a timing between a first data-stream group and a second data-stream group in accordance with a timing setting. A data generator in first test mode generates a first test-data stream repeating 2N-bit marks and 2N-bit spaces as each of a first data stream and a third data stream, and generates a second test-data stream that is N-bit shifted from the first test-data stream, where N denotes a natural number. A first phase-difference setting and a second phase-difference setting are rendered zero. The timing adjuster adjusts the timing setting so as to maximize a detected value from a peak detection circuit.