An apparatus configured to decode video information includes a memory and a processor in communication with the memory. The memory is configured to a memory configured to store video information associated with bitstream. The apparatus further includes a processor in communication with the memory, the processor configured to determine that a reference layer is not included in the bitstream and to receive, from an external source, a decoded base layer picture. The processor is further configured to receive, from the external source, a first indication that the picture is an intra random access point (IRAP) picture. The processor is also configured to receive a second indication whether the picture is one of an instantaneous decoder refresh (IDR) picture, a clean random access (CRA) picture, or a broken link access (BLA) picture; and to decode the video information based at least in part on the first and second indications.