Invention Grant
- Patent Title: Low latency corrupt data tagging on a cross-chip link
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Application No.: US15822954Application Date: 2017-11-27
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Publication No.: US10554347B2Publication Date: 2020-02-04
- Inventor: Chad M. Albertson , Eric J. Campbell , Nicholas J. Ollerich , Christopher W. Steffen , Curtis C. Wollbrink
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Jason H. Sosa
- Main IPC: H04L1/20
- IPC: H04L1/20 ; G06F11/00

Abstract:
Low latency corrupt data tagging on a cross-chip link including receiving, from the cross-chip link, a control flit comprising a virtual channel identifier for an incoming data flit; storing the virtual channel identifier in a data pipeline and a bad data indicator (BDI) pipeline; receiving, from the cross-chip link, the incoming data flit into the data pipeline; moving, based on the virtual channel identifier in the data pipeline, the data flit from the data pipeline into an entry in a virtual channel queue corresponding to the virtual channel identifier; receiving, from the cross-chip link, a BDI for the data flit into the BDI pipeline; and moving, based on the virtual channel identifier in the BDI pipeline, the BDI for the data flit from the BDI pipeline into an entry in a BDI array corresponding to the entry in the virtual channel queue storing the data flit.
Public/Granted literature
- US20190089496A1 LOW LATENCY CORRUPT DATA TAGGING ON A CROSS-CHIP LINK Public/Granted day:2019-03-21
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