Invention Grant
- Patent Title: Capacitor structure with correlated error mitigation and improved systematic mismatch in technologies with multiple patterning
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Application No.: US15969547Application Date: 2018-05-02
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Publication No.: US10574249B2Publication Date: 2020-02-25
- Inventor: Tao Wang , Mansour Keramat , Yi Chun A. Fu
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Jaffery Watson Mendonsa & Hamilton LLP
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H01L23/528 ; H01L27/10

Abstract:
Capacitor arrays and methods of operating a digital to analog converter are described. In an embodiment, a capacitor array includes a unit capacitor (Cu) structure characterized by a unit capacitance value, a plurality of different super-unit capacitor structures, and a plurality of different sub-unit capacitor structures, each different sub-unit capacitor structure having a different capacitance defined by a division of the unit capacitance value.
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