An apparatus includes a microcontroller (404) configured to read from a Management Information Base (MIB) register (410) of an Ethernet switch (402) to obtain MIB statistic data (412) regarding a first Ethernet port of the Ethernet switch. The microcontroller is configured to transmit the obtained MIB statistic data to a field programmable gate array (FPGA) (406). The FPGA is configured to receive and store the obtained MIB statistic data in a buffer memory (418). The FPGA is configured to encapsulate the obtained MIB statistic data in an Ethernet frame (426). The FPGA is configured to determine a vacant time slot during which the Ethernet switch is not transmitting data to an external device (524). The FPGA is configured to transmit the Ethernet frame to the external device during the vacant time slot.