- Patent Title: Semiconductor device structure including high voltage MOS device
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Application No.: US15886717Application Date: 2018-02-01
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Publication No.: US10586735B2Publication Date: 2020-03-10
- Inventor: Kai-Kuen Chang , Shih-Yin Hsiao
- Applicant: United Microelectronics Corp.
- Applicant Address: TW Hsinchu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/423 ; H01L29/08 ; H01L27/092 ; H01L29/78 ; H01L21/8234

Abstract:
A method for fabricating a semiconductor device structure is shown. A gate dielectric layer is formed on a substrate. A portion of the gate dielectric layer, which is located on a part of the substrate in which an S/D region is to be formed, is removed. A gate electrode is formed on the remaining gate dielectric layer. A spacer is formed on the sidewall of the gate electrode and the sidewall of the gate dielectric layer. The S/D region is then formed in the part of the substrate beside the spacer.
Public/Granted literature
- US20180158738A1 SEMICONDUCTOR DEVICE STRUCTURE Public/Granted day:2018-06-07
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