发明授权
- 专利标题： Architecture and instruction set for implementing advanced encryption standard (AES)
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申请号： US15639946申请日： 2017-06-30
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公开(公告)号： US10587395B2公开(公告)日： 2020-03-10
- 发明人: Shay Gueron , Wajdi K. Feghali , Vinodh Gopal
- 申请人： INTEL CORPORATION
- 申请人地址： US CA Santa Clara
- 专利权人： INTEL CORPORATION
- 当前专利权人： INTEL CORPORATION
- 当前专利权人地址： US CA Santa Clara
- 代理机构： NDWE, LLP
- 主分类号： G06F21/00
- IPC分类号： G06F21/00 ; H04L9/06 ; G06F9/30 ; G06F21/60 ; H04L9/14
摘要：
A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.
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