A display device includes a data driver, a multiplexer, and a multiplexer controller. The data driver outputs a data voltage through output buffers. The multiplexer distributes each of the data voltages output by the output buffers to data lines in a time division manner in response to first to control signals. The multiplexer controller sequentially outputs control signals in a time division manner. Each control signal transitions to a gate ON voltage during a prior horizontal period and maintains the gate ON voltage for an intended horizontal period.