A display device includes a timing controller, a driver, and a display panel. The timing controller outputs a first clock signal having first rising time during an active section and a second clock signal having second rising time during a blank section adjacent to the active section. The driver generates a data signal based on the first clock signal and the second clock signal and to output the data signal. The display panel displays an image based on the data signal. The first rising time is shorter than the second rising time.