Invention Grant
- Patent Title: Integrated circuit die and manufacture method thereof
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Application No.: US15797549Application Date: 2017-10-30
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Publication No.: US10607913B2Publication Date: 2020-03-31
- Inventor: HuiLi Fu , Shujie Cai , Feiyu Luo
- Applicant: HUAWEI TECHNOLOGIES CO., LTD.
- Applicant Address: CN Shenzhen
- Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Shenzhen
- Agency: Conley Rose, P.C.
- Priority: CN201510221081 20150430
- Main IPC: H01L23/36
- IPC: H01L23/36 ; H01L23/367 ; H01L21/02 ; H01L21/768 ; H01L23/31 ; H01L23/528 ; H01L23/00

Abstract:
The present invention provide an IC die, including an underlay; an active component; an interconnection layer, covering the active component, where the interconnection layer includes multiple metal layers and multiple dielectric layers, the multiple metal layers and the multiple dielectric layers are alternately arranged, a metal layer whose distance to the active component is the farthest in the multiple metal layers includes metal cabling and a metal welding pad; and a heat dissipation layer, where the heat dissipation layer covers a region above the interconnection layer except a position corresponding to the metal welding pad, the heat dissipation layer is located under a package layer, the package layer includes a plastic packaging material, and the heat dissipation layer includes an electrical-insulating material whose heat conductivity is greater than a preset value.
Public/Granted literature
- US20180068922A1 INTEGRATED CIRCUIT DIE AND MANUFACTURE METHOD THEREOF Public/Granted day:2018-03-08
Information query
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