Invention Grant
- Patent Title: Semiconductor device and method for manufacturing same
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Application No.: US16072910Application Date: 2017-01-16
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Publication No.: US10651209B2Publication Date: 2020-05-12
- Inventor: Takao Saitoh , Yohsuke Kanzaki , Makoto Nakazawa , Kazuatsu Ito , Seiji Kaneko
- Applicant: Sharp Kabushiki Kaisha
- Applicant Address: JP Sakai
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Sakai
- Agency: Keating & Bennett, LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@38408190
- International Application: PCT/JP2017/001252 WO 20170116
- International Announcement: WO2017/130776 WO 20170803
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/45 ; H01L29/66 ; G06F3/041 ; H01L21/768 ; H01L29/786 ; G06F3/044

Abstract:
A semiconductor device includes: a first thin film transistor (101) including a crystalline silicon semiconductor layer (13); and a second thin film transistor (102) including an oxide semiconductor layer (23). First source/drain electrodes (31), (33) of the first thin film transistor (101) are provided on the crystalline silicon semiconductor layer via a first interlevel dielectric layer (L1); a second source electrode (25S) of the second thin film transistor (102) is electrically connected to a line (35) which is made of the same conductive film as the first source/drain electrodes; the line (35) is provided on the second source electrode (25S) via a second interlevel dielectric layer (L2), and is in contact with the second source electrode (25S) within a second contact hole including an opening made in the second interlevel dielectric layer (L2); the second source electrode has a multilayer structure including a main layer (25m) and an upper layer (25u) disposed on the main layer such that, under the opening in the second interlevel dielectric layer, the upper layer (25u) has a first aperture and the main layer (25m) has a second aperture (p2) or recess, the second aperture (p2) or recess being larger than the first aperture (p1) as viewed from the normal direction of the substrate.
Public/Granted literature
- US20190035824A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2019-01-31
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