Invention Grant
- Patent Title: Dual metal via for contact resistance reduction
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Application No.: US15898706Application Date: 2018-02-19
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Publication No.: US10651292B2Publication Date: 2020-05-12
- Inventor: Chung-Liang Cheng , Yen-Yu Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/768 ; H01L29/78 ; H01L29/06 ; H01L29/423 ; H01L21/762 ; H01L21/285

Abstract:
A semiconductor device includes an active region over a substrate; a first cobalt-containing feature disposed over the active region; a conductive cap disposed over and in physical contact with the first cobalt-containing feature; and a second cobalt-containing feature disposed over and in physical contact with the conductive cap.
Public/Granted literature
- US20190259855A1 Dual Metal Via for Contact Resistance Reduction Public/Granted day:2019-08-22
Information query
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