A gate driving circuit provided in embodiments of the present disclosure includes: N-stage gate driving units, the gate driving unit at each stage of the N-stage gate driving units having a first voltage terminal and a clock signal terminal, and a first transmission path being formed between the first voltage terminal and the clock signal terminal, wherein at each stage, the first transmission path of the gate driving unit is conductive when the gate driving unit is in a non-operative state; and a first voltage line connected to the first voltage terminal of the gate driving unit at each stage. A preset voltage received by a clock signal terminal of a gate driving unit that is in a non-operative state is transmitted to the first voltage line through the first transmission path of the gate driving unit.