- 专利标题： Semiconductor package structure, semiconductor wafer level package and semiconductor manufacturing process
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申请号： US16178241申请日： 2018-11-01
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公开(公告)号： US10658257B1公开(公告)日： 2020-05-19
- 发明人: Dao-Long Chen , Chih-Pin Hung , Ming-Hung Chen
- 申请人： Advanced Semiconductor Engineering, Inc.
- 申请人地址： TW Kaohsiung
- 专利权人： ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- 当前专利权人： ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- 当前专利权人地址： TW Kaohsiung
- 代理机构： Foley & Lardner LLP
- 主分类号： H01L23/29
- IPC分类号： H01L23/29 ; H01L23/498 ; H01L23/31 ; H01L21/56 ; H01L21/48 ; H01L23/00
摘要：
A semiconductor package structure includes a semiconductor die, at least one wiring structure, an encapsulant and a plurality of conductive elements. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The encapsulant surrounds the semiconductor die. The encapsulant is formed from an encapsulating material, and a Young's Modulus of the encapsulant is from 0.001 GPa to 1 GPa. The conductive elements are embedded in the encapsulant, and are electrically connected to the at least one wiring structure.
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