Invention Grant
- Patent Title: Vertical III-N transistors with lateral overgrowth over a protruding III-N semiconductor structure
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Application No.: US15773422Application Date: 2015-12-24
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Publication No.: US10658502B2Publication Date: 2020-05-19
- Inventor: Sansaptak Dasgupta , Han Wui Then , Marko Radosavljevic
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- International Application: PCT/US2015/000422 WO 20151224
- International Announcement: WO2017/111852 WO 20170629
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/08 ; H01L29/20 ; H01L29/78 ; H01L29/06 ; H01L21/02 ; H01L29/423 ; H01L29/66

Abstract:
III-N transistor including a vertically-oriented lightly-doped III-N drift region between an overlying III-N 2DEG channel and an underlying heavily-doped III-N drain. In some embodiments, the III-N transistors are disposed over a silicon substrate. In some embodiments, lateral epitaxial overgrowth is employed to form III-N islands self-aligned with the vertically-oriented drift region. A gate electrode disposed over a portion of a III-N island may modulate a 2DEG within a channel region of the III-N island disposed above the III-N drift region. Charge carriers in the 2DEG channel may be swept into the drift region toward the drain. Topside contacts to each of the gate, source, and drain may be pitch scaled independently of a length of the drift region.
Public/Granted literature
- US20180323298A1 VERTICAL III-N TRANSISTORS WITH LATERAL EPITAXIAL OVERGROWTH Public/Granted day:2018-11-08
Information query
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