Invention Grant
- Patent Title: Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric
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Application No.: US16166762Application Date: 2018-10-22
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Publication No.: US10679989B2Publication Date: 2020-06-09
- Inventor: Chih-Han Lin , Che-Cheng Chang , Horng-Huei Tseng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234

Abstract:
An exemplary semiconductor device includes first spacers disposed along sidewalls of a first gate structure and second spacers disposed along sidewalls of a second gate structure. A source/drain region is disposed between the first gate structure and the second gate structure. A first ILD layer is disposed between the first spacers and the second spacers. A portion of the first ILD layer has a first recessed upper surface. A dielectric layer is disposed over the first spacers, the second spacers, and the first recessed upper surface of the first ILD layer. A portion of the dielectric layer has a second recessed upper surface that is disposed over the portion of the first ILD layer having the first recessed upper surface. A second ILD layer is disposed over the dielectric layer. A contact extends through the second ILD layer, the dielectric layer, and the first ILD layer to the source/drain region.
Public/Granted literature
- US20190057964A1 Enlarging Spacer Thickness by Forming a Dielectric Layer Over a Recessed Interlayer Dielectric Public/Granted day:2019-02-21
Information query
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