Invention Grant
- Patent Title: Erasing memory cells
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Application No.: US16411622Application Date: 2019-05-14
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Publication No.: US10685717B2Publication Date: 2020-06-16
- Inventor: Jun Xu
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C16/16
- IPC: G11C16/16 ; G11C16/04 ; G11C16/26

Abstract:
Apparatus and methods of operating such apparatus include applying a first voltage level to a source connected to a first end of a string of series-connected memory cells, applying a second voltage level to a data line connected to a second end of the string of series-connected memory cells, and applying a third voltage level to a first access line coupled to a first memory cell of the string of series-connected memory cells concurrently with applying the first and second voltage levels, wherein the magnitude of the third voltage level is greater than the magnitude of both the first voltage level and the second voltage level, and wherein a polarity and the magnitude of the third voltage level are expected to decrease a threshold voltage of the first memory cell when concurrently applying the first, second and third voltage levels.
Public/Granted literature
- US20190267095A1 ERASING MEMORY CELLS Public/Granted day:2019-08-29
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