Invention Grant
- Patent Title: Semiconductor structure for preventing row hammering issue in DRAM cell and method for manufacturing the same
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Application No.: US16028364Application Date: 2018-07-05
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Publication No.: US10685964B2Publication Date: 2020-06-16
- Inventor: Chih-Chieh Tsai , Pin-Hong Chen , Tzu-Chieh Chen , Tsun-Min Cheng , Yi-Wei Chen , Hsin-Fu Huang , Chi-Mao Hsu , Shih-Fang Tzou
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hsu
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4616e802
- Main IPC: H01L27/108
- IPC: H01L27/108
Abstract:
A semiconductor structure for preventing row hammering issue in DRAM cell is provided in the present invention. The structure includes a trench with a gate dielectric, an n-type work function metal layer, a TiN layer conformally formed within, and a buried word line filled in the trench.
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