Invention Grant
- Patent Title: Image pipeline with dual demosaicing circuit for efficient image processing
-
Application No.: US16100709Application Date: 2018-08-10
-
Publication No.: US10692177B2Publication Date: 2020-06-23
- Inventor: Muge Wang , David R. Pope
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Fenwick & West LLP
- Main IPC: G06T3/40
- IPC: G06T3/40 ; G06T1/20 ; G06T7/20 ; G06T5/00

Abstract:
Embodiments relate to a first demosaicing circuit and a second demosaicing circuit that can perform demosaicing of image data. The first demosaicing circuit processes received image data to generate a first demosaiced image for obtaining statistic information on the received image data. The second demosaicing circuit performs demosaicing of the received image data to generate a second demosaiced image. A processing circuit pipeline performs at least one of resampling, noise processing, color processing and output rescaling performed on the second demosaiced image based on the statistics information obtained from the first demosaiced image.
Public/Granted literature
- US20200051210A1 IMAGE PIPELINE WITH DUAL DEMOSAICING CIRCUIT FOR EFFICIENT IMAGE PROCESSING Public/Granted day:2020-02-13
Information query