Semiconductor structure and fabrication method are provided. The method includes: providing a substrate including device regions and isolation regions, adjacent with one another; providing discrete fins on the substrate, pitches between adjacent fins being substantially same; forming a protective layer on the sidewalls of the fins; removing a partial thickness of the fins in the isolation regions along with a partial thickness of the protective layer in the isolation regions by a first etching process; forming dummy fins by a second etching process to etch the remaining fins in the isolation regions using the remaining protective layers as a mask; removing the remaining protective layer after the second etching process; and forming isolation structures in the isolation regions on the substrate. The isolation structures have a top lower than the fins in the device regions and higher than the dummy fins in the isolation regions.