• Patent Title: Device and method for concurrently analyzing a plurality of telecommunications signal protocols
  • Application No.: US14513092
    Application Date: 2014-10-13
  • Publication No.: US10705938B2
    Publication Date: 2020-07-07
  • Inventor: David Webster
  • Applicant: David Webster
  • Agent Donn K. Harms
  • Main IPC: G06F11/32
  • IPC: G06F11/32 G06F11/25 G06F11/22
Device and method for concurrently analyzing a plurality of telecommunications signal protocols
Abstract:
An improved method for telecommunication analysis and monitoring employing a logic analyzer device. The logic analyzer device provides a plurality of concurrent graphic depictions of different electronic signals under differing electronic protocols for signal error determination on a communications channel. Error source determination is enabled through the provided concurrent depiction of digital and analog signal characteristics in the differing protocols, including digital data packets, signal voltages and timing. Through this concurrent depiction the user can visually discern potential causation for electronic communication errors caused by non-continuous signal anomalies affecting one or more of the protocols.
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