- 专利标题: Analog-to-digital converter and solid-state image sensor
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申请号: US16534835申请日: 2019-08-07
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公开(公告)号: US10708532B2公开(公告)日: 2020-07-07
- 发明人: Takeo Ushinaga , Yoshinao Morikawa
- 申请人: SHARP KABUSHIKI KAISHA
- 申请人地址: JP Sakai, Osaka
- 专利权人: SHARP KABUSHIKI KAISHA
- 当前专利权人: SHARP KABUSHIKI KAISHA
- 当前专利权人地址: JP Sakai, Osaka
- 代理机构: ScienBiziP, P.C.
- 主分类号: H04N5/374
- IPC分类号: H04N5/374 ; H03M1/34 ; H04N5/3745
摘要:
[Object] To prevent code skipping in decoding.[Solution] Included are a low-order bit latch unit (63) that latches digital code data as a low-order bit, a high-order bit counter unit (64) that counts one or both of edges of a control signal corresponding to a reference clock, and stops counting of high-order bits, triggered by output of a comparator (62) being inverted, a low-order bit decoding signal latch unit (65) that latches a low-order bit decoding signal, and a signal processing unit (8).
公开/授权文献
- US20200053310A1 ANALOG-TO-DIGITAL CONVERTER AND SOLID-STATE IMAGE SENSOR 公开/授权日:2020-02-13
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