- 专利标题: Using three or more masks to define contact-line-blocking components in FinFET SRAM fabrication
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申请号: US16741419申请日: 2020-01-13
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公开(公告)号: US10714488B2公开(公告)日: 2020-07-14
- 发明人: Shih-Han Huang , Chih-Hung Hsieh
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L27/11
- IPC分类号: H01L27/11 ; H01L21/8238 ; H01L21/768 ; H01L27/092 ; H01L21/311 ; H01L21/265 ; H01L21/02 ; H01L29/78
摘要:
A plurality of gate stacks is formed over a substrate. The gate stacks are surrounded by a dielectric structure. A plurality of contact-line-blocking patterns is formed over the dielectric structure. The contact-line-blocking patterns are formed using three or more lithography masks. A plurality of trenches is formed in the dielectric structure. The contact-line-blocking patterns serve as protective masks for the dielectric structure to prevent trenches from being formed in portions of the dielectric structure underneath the contact-line-blocking patterns. The trenches are filled with a conductive material to form a plurality of contact lines of the SRAM device.
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