Invention Grant
- Patent Title: Sparse matrix vector multiplication with a matrix vector multiplication unit
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Application No.: US16159578Application Date: 2018-10-12
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Publication No.: US10726096B2Publication Date: 2020-07-28
- Inventor: Soumitra Chatterjee , Chinmay Ghosh , Mashood Abdulla Kodavanji , Mohan Parthasarathy
- Applicant: Hewlett Packard Enterprise Development LP
- Applicant Address: US TX Houston
- Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Current Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Current Assignee Address: US TX Houston
- Agency: Sheppard Mullin Richter & Hampton LLP
- Main IPC: G06F17/16
- IPC: G06F17/16 ; G06N3/04 ; G06N3/08

Abstract:
Systems and methods are provided for sparse matrix vector multiplication with a matrix vector multiplication unit. The method includes partitioning a sparse matrix of entries into a plurality of sub-matrices; mapping each of the sub-matrices to one of a plurality of respective matrix vector multiplication engines; partitioning an input vector into a plurality of sub-vectors; computing, via each matrix vector multiplication engine, a plurality of intermediate result vectors each resulting from a multiplication of one of the sub-matrices and one of the sub-vectors; for each set of rows of the sparse matrix, adding elementwise the intermediate result vectors to produce a plurality of result sub-vectors; and concatenating the result sub-vectors to form a result vector.
Public/Granted literature
- US20200117700A1 SPARSE MATRIX VECTOR MULTIPLICATION WITH A MATRIX VECTOR MULTIPLICATION UNIT Public/Granted day:2020-04-16
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