Invention Grant
- Patent Title: Integrated vertical and lateral semiconductor devices
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Application No.: US16235263Application Date: 2018-12-28
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Publication No.: US10741551B2Publication Date: 2020-08-11
- Inventor: Victor Mario Torres
- Applicant: General Electric Company
- Applicant Address: US NY Niskayuna
- Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee: GENERAL ELECTRIC COMPANY
- Current Assignee Address: US NY Niskayuna
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/088 ; H01L21/82 ; H01L21/761 ; H01L21/8238

Abstract:
An integrated circuit die that may have one vertical transistor and one horizontal transistor is disclosed. The transistors may have substantially different breakdown voltages. The vertical transistor may be used in power circuitry applications and the horizontal transistor may be used in logic circuitry applications.
Public/Granted literature
- US20200212034A1 INTEGRATED VERTICAL AND LATERAL SEMICONDUCTOR DEVICES Public/Granted day:2020-07-02
Information query
IPC分类: