- 专利标题: Information processing apparatus and information processing method for process order in reconfigurable circuit
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申请号: US16032101申请日: 2018-07-11
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公开(公告)号: US10754817B2公开(公告)日: 2020-08-25
- 发明人: Toshiyuki Ichiba
- 申请人: FUJITSU LIMITED
- 申请人地址: JP Kawasaki
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki
- 代理机构: Fujitsu Patent Center
- 优先权: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2b77e5a9
- 主分类号: G06F15/78
- IPC分类号: G06F15/78 ; G06F17/50 ; H03K19/177 ; H03K19/17736 ; H03K19/17748 ; G06F30/34
摘要:
An information processing apparatus having a reconfigurable circuit capable of rewriting a logic circuit includes, a process determination circuit that determines which of a plurality of processes is to be executed, a standby buffer circuit that holds process data to be used in a process waiting for execution among processes determined by the process determination circuit, and a rewrite control circuit that rewrites the current logic circuit written in the reconfigurable circuit to a logic circuit that executes one of the plurality of processes waiting for execution using each of a plurality of process data held in the standby buffer circuit when the amount of process data held in the standby buffer circuit exceeds a first predetermined amount.
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