Invention Grant
- Patent Title: Architectures and layouts for an array of resistive random access memory cells and read and write methods thereof
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Application No.: US15701071Application Date: 2017-09-11
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Publication No.: US10755779B2Publication Date: 2020-08-25
- Inventor: Hieu Van Tran , Anh Ly , Thuan Vu , Stanley Hong , Feng Zhou , Xian Liu , Nhan Do
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP US
- Main IPC: G11C13/00
- IPC: G11C13/00 ; H01L45/00 ; H01L27/24 ; G11C7/06

Abstract:
Various architectures and layouts for an array of resistive random access memory (RRAM) cells are disclosed. The RRAM cells are organized into rows and columns, with each cell comprising a top electrode, a bottom electrode, and a switching layer. Circuitry is included for improving the reading and writing of the array, including the addition of a plurality of columns of dummy RRAM cells in the array used as a ground source, connecting source lines to multiple pairs of rows of RRAM cells, and the addition of rows of isolation transistors.
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