Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US16116892Application Date: 2018-08-29
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Publication No.: US10756058B2Publication Date: 2020-08-25
- Inventor: Ying-Ching Shih , Chih-Wei Wu , Szu-Wei Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/065 ; H01L23/31 ; H01L23/538 ; H01L23/00 ; H01L23/498 ; H01L25/00 ; H01L21/56

Abstract:
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first chip, a second chip, self-aligned structures, a bridge structure, and an insulating encapsulant. The first chip has a first rear surface opposite to a first active surface. The second chip is disposed beside the first chip and has a second rear surface opposite to a second active surface. The self-aligned structures are disposed on the first rear surface of the first chip and the second rear surface of the second chip. The bridge structure is electrically connected to the first chip and the second chip. The insulating encapsulant covers at least the side surfaces of the first and second chips, a side surface of the semiconductor substrate, and the side surfaces of the self-aligned structures.
Public/Granted literature
- US20200075546A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-03-05
Information query
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