Invention Grant
- Patent Title: Deeply-pipelined high-throughput LDPC decoder architecture
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Application No.: US15712845Application Date: 2017-09-22
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Publication No.: US10778371B2Publication Date: 2020-09-15
- Inventor: Vincent Loncke , Girish Varatkar , Thomas Joseph Richardson , Yi Cao
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Patterson + Sheridan, LLP
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H04L1/00 ; H03M13/11 ; G06F11/00 ; G06F11/30 ; G06F11/14

Abstract:
Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to a deeply-pipelined layered LDPC decoder architecture for high decoding throughputs. Accordingly, aspects of the present disclosure provide techniques for reducing delays in a processing pipeline by, in some cases, relaxing a dependency between updating bit log likelihood ratios (LLRs) and computing a posteriori LLRs.
Public/Granted literature
- US20180123734A1 DEEPLY-PIPELINED HIGH-THROUGHPUT LDPC DECODER ARCHITECTURE Public/Granted day:2018-05-03
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