Invention Grant
- Patent Title: Trench isolation preservation during transistor fabrication
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Application No.: US16263650Application Date: 2019-01-31
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Publication No.: US10784143B2Publication Date: 2020-09-22
- Inventor: Haiting Wang , Guowei Xu , Hui Zang , Yue Zhong
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Thompson Hine LLP
- Agent Francois Pagette
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L21/762 ; H01L21/8238 ; H01L21/3213 ; H01L29/78 ; H01L27/092 ; H01L29/66

Abstract:
Structures that include a field effect-transistor and methods of forming a structure that includes a field-effect transistor. A semiconductor fin has an upper portion and a lower portion, and a trench isolation region surrounds the lower portion of the semiconductor fin. The trench isolation region has a top surface arranged above the lower portion of the semiconductor fin and arranged below the upper portion of the semiconductor fin. A dielectric layer arranged over the top surface of the trench isolation region. The dielectric layer is composed of a low-k dielectric material.
Public/Granted literature
- US20200251377A1 TRENCH ISOLATION PRESERVATION DURING TRANSISTOR FABRICATION Public/Granted day:2020-08-06
Information query
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