Invention Grant
- Patent Title: Plurality of semiconductor devices encapsulated by a molding material attached to a redistribution layer
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Application No.: US15800035Application Date: 2017-10-31
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Publication No.: US10784220B2Publication Date: 2020-09-22
- Inventor: Shin-Puu Jeng , Shuo-Mao Chen , Feng-Cheng Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/34 ; H01L23/48 ; H01L23/28 ; H01L21/00 ; H01L21/44 ; H01L23/00 ; H01L23/31 ; H01L21/683 ; H01L25/065 ; H01L25/00 ; H01L25/10 ; H01L23/498 ; H01L21/56 ; H01L23/538

Abstract:
A package structure includes a first dielectric layer, a first semiconductor device, a first redistribution line, a second dielectric layer, a second semiconductor device, a second redistribution line, a first conductive feature, and a first molding material. The first semiconductor device is over the first dielectric layer. The first redistribution line is in the first dielectric layer and is electrically connected to the first semiconductor device. The second dielectric layer is over the first semiconductor device. The second semiconductor device is over the second dielectric layer. The second redistribution line is in the second dielectric layer and is electrically connected to the second semiconductor device. The first conductive feature electrically connects the first redistribution line and the second redistribution line. The first molding material molds the first semiconductor device and the first conductive feature.
Public/Granted literature
- US20180286824A1 PACKAGE STRUCTURE AND METHOD OF FORMING PACKAGE STRUCTURE Public/Granted day:2018-10-04
Information query
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