- Patent Title: Method of forming a stop layer filling in a space between spacers
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Application No.: US16583272Application Date: 2019-09-26
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Publication No.: US10790289B2Publication Date: 2020-09-29
- Inventor: Chih-Chien Liu , Tzu-Chin Wu , Po-Chun Chen , Chia-Lung Chang
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu CN Quanzhou, Fujian Province
- Agent Winston Hsu
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1f9f0f03
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/108 ; H01L21/02 ; H01L21/8234

Abstract:
A fabricating method of a stop layer includes providing a substrate. The substrate is divided into a memory region and a peripheral circuit region. Two conductive lines are disposed within the peripheral circuit region. Then, an atomic layer deposition is performed to form a silicon nitride layer to cover the conductive lines. Later, after forming the silicon nitride layer, a silicon carbon nitride layer is formed to cover the silicon nitride layer. The silicon carbon nitride layer serves as a stop layer.
Public/Granted literature
- US20200020693A1 SEMICONDUCTOR STRUCTURE WITH A CONDUCTIVE LINE AND FABRICATING METHOD OF A STOP LAYER Public/Granted day:2020-01-16
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