- 专利标题： Compact non-volatile memory device of the type with charge trapping in a dielectric interface
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申请号： US16542511申请日： 2019-08-16
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公开(公告)号： US10790293B2公开(公告)日： 2020-09-29
- 发明人: Francesco La Rosa , Stephan Niel , Arnaud Regnier
- 申请人： STMicroelectronics (Rousset) SAS
- 申请人地址： FR Rousset
- 专利权人： STMICROELECTRONICS (ROUSSET) SAS
- 当前专利权人： STMICROELECTRONICS (ROUSSET) SAS
- 当前专利权人地址： FR Rousset
- 代理机构： Slater Matsil, LLP
- 优先权： com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@678723a4
- 主分类号： H01L27/11563
- IPC分类号： H01L27/11563 ; H01L21/28 ; H01L27/1157 ; H01L29/423 ; G11C16/04 ; H01L27/11536
摘要：
A memory device includes a first state transistor and a second state transistor having a common control gate. A first selection transistor is buried in the semiconductor body and coupled to the first state transistor so that current paths of the first selection transistor and first state transistor are coupled in series. A second selection transistor is buried in the semiconductor body and coupled to the second state transistor so that current paths of the second selection transistor and second state transistor are coupled in series. The first and second selection transistors have a common buried selection gate. A dielectric region is located between the common control gate and the semiconductor body. A first bit line is coupled to the first state transistor and a second bit line is coupled to the second state transistor.
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