Invention Grant
- Patent Title: Translation lookaside buffer management method and multi-core processor
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Application No.: US16178676Application Date: 2018-11-02
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Publication No.: US10795826B2Publication Date: 2020-10-06
- Inventor: Lei Fang , Weiguang Cai , Xiongli Gu
- Applicant: HUAWEI TECHNOLOGIES CO., LTD.
- Applicant Address: CN Shenzhen, Guangdong
- Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Shenzhen, Guangdong
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/1027 ; G06F12/0806 ; G06F12/128 ; G06F12/0842 ; G06F12/1009 ; G06F12/0811

Abstract:
A translation lookaside buffer (TLB) management method and a multi-core processor are provided. The method includes: receiving, by a first core, a first address translation request; querying a TLB of the first core based on the first address translation request; determining that a first target TLB entry corresponding to the first address translation request is missing in the TLB of the first core, obtaining the first target TLB entry; determining that entry storage in the TLB of the first core is full; determining a second core from cores in an idle state in the multi-core processor; replacing a first entry in the TLB of the first core with the first target TLB entry; storing the first entry in a TLB of the second core. Accordingly, a TLB miss rate is reduced and program execution is accelerated.
Public/Granted literature
- US20190073315A1 TRANSLATION LOOKASIDE BUFFER MANAGEMENT METHOD AND MULTI-CORE PROCESSOR Public/Granted day:2019-03-07
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