Invention Grant
- Patent Title: 3D interconnect multi-die inductors with through-substrate via cores
-
Application No.: US16138838Application Date: 2018-09-21
-
Publication No.: US10796989B2Publication Date: 2020-10-06
- Inventor: Kyle K. Kirby
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/48 ; H01L25/065
Abstract:
A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.
Public/Granted literature
- US20190027437A1 3D INTERCONNECT MULTI-DIE INDUCTORS WITH THROUGH-SUBSTRATE VIA CORES Public/Granted day:2019-01-24
Information query
IPC分类:
