Invention Grant
- Patent Title: Read-with-invalidate modified data in a cache line in a cache memory
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Application No.: US16239455Application Date: 2019-01-03
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Publication No.: US10831658B2Publication Date: 2020-11-10
- Inventor: Yanru Li , Chia-Hung Kuo , Ali Taha
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Konrad Raynes Davda & Victor LLP
- Agent David W. Victor
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0808 ; G06F12/0853 ; G06F12/126 ; G06F12/0811 ; G06F12/0868
Abstract:
Provided are an apparatus and method to cache data in a first memory that is stored in a second memory. At least one read-with-invalidate command is received to read and invalidate at least one portion of a cache line having modified data. The cache line having modified data is invalidated in response to receipt of read-with-invalidate commands for less than all of the portions of the cache line.
Public/Granted literature
- US20190138448A1 READ-WITH-INVALIDATE MODIFIED DATA IN A CACHE LINE IN A CACHE MEMORY Public/Granted day:2019-05-09
Information query
