Invention Grant
- Patent Title: Multilayer electronic component manufacturing method and multilayer electronic component
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Application No.: US15840916Application Date: 2017-12-13
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Publication No.: US10886061B2Publication Date: 2021-01-05
- Inventor: Kaoru Tachibana
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto-fu
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Kyoto-fu
- Agency: Studebaker & Brackett PC
- Priority: JP2016-255949 20161228
- Main IPC: H01F5/00
- IPC: H01F5/00 ; H01F27/29 ; H01F27/245 ; H01F27/28 ; H01F41/02 ; H01F27/32 ; H01F17/00 ; H01G4/232 ; H01C17/00 ; H01G4/30 ; H01G4/12 ; H01G4/228 ; H01C1/14 ; H01C7/18

Abstract:
A multilayer electronic component manufacturing method includes forming a multilayer body including a plurality of ceramic layers, and forming a groove by removing a part of a bottom surface of the multilayer body. The method further includes segmenting the multilayer body by dividing the multilayer body into a plurality of chip regions, and forming an outer electrode conductor layer on the bottom surface of the multilayer body after formation of the groove and segmentation.
Public/Granted literature
- US20180182536A1 MULTILAYER ELECTRONIC COMPONENT MANUFACTURING METHOD AND MULTILAYER ELECTRONIC COMPONENT Public/Granted day:2018-06-28
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