Semiconductor memory device having an array chip bonded to a circuit chip by a bonding metal
摘要:
According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L27/00 由在一个共用衬底内或其上形成的多个半导体或其他固态组件组成的器件(其零部件入H01L23/00,H01L29/00至H01L51/00;由多个单个固态器件组成的组装件入H01L25/00)
H01L27/02 .包括有专门适用于整流、振荡、放大或切换的半导体组件并且至少有一个电位跃变势垒或者表面势垒的;包括至少有一个跃变势垒或者表面势垒的无源集成电路单元的
H01L27/04 ..其衬底为半导体的
H01L27/10 ...在重复结构中包括有多个独立组件的
H01L27/105 ....包含场效应组件的
H01L27/112 .....只读存储器结构的
H01L27/115 ...... · · · · ·电动编程只读存储器;其多步骤制造方法
H01L27/11563 ....... · · · · · ·具有电荷俘获栅极绝缘层的,例如,MNOS,NROM
H01L27/11573 ........ · · · · · · · 以外围电路区为特征的
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