- 专利标题: Semiconductor memory device having an array chip bonded to a circuit chip by a bonding metal
-
申请号: US16508577申请日: 2019-07-11
-
公开(公告)号: US10892270B2公开(公告)日: 2021-01-12
- 发明人: Yoshiaki Fukuzumi , Hideaki Aochi
- 申请人: Toshiba Memory Corporation
- 申请人地址: JP Minato-ku
- 专利权人: Toshiba Memory Corporation
- 当前专利权人: Toshiba Memory Corporation
- 当前专利权人地址: JP Minato-ku
- 代理机构: Oblon, McClelland, Maier & Neustadt, L.L.P.
- 优先权: JP2014-186684 20140912
- 主分类号: H01L27/11573
- IPC分类号: H01L27/11573 ; H01L27/11582 ; H01L25/18 ; H01L27/11568 ; H01L21/768 ; H01L21/18 ; H01L23/00
摘要:
According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
公开/授权文献
信息查询
IPC分类: