Invention Grant
- Patent Title: Pseudo-non-volatile memory cells
-
Application No.: US16235163Application Date: 2018-12-28
-
Publication No.: US10896717B2Publication Date: 2021-01-19
- Inventor: Scott J. Derner , Christopher J. Kawamura
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G11C11/4074 ; G06F3/06

Abstract:
An example apparatus includes an array of memory cells coupled to an array power supply and a controller. The controller may be configured to cause a data value to be stored in at least one memory cell of the array of memory cells while the array of memory cells is operating in a first power state and a determination to be made that a change in a power status to a computing system coupled to the array of memory cells has occurred, wherein the change in the power status of the computing system is characterized by the computing device operating in a reduced power state. Responsive to the determination, the controller may be configured to cause the array power supply to be disabled to operate the array of memory cells in a second power state.
Public/Granted literature
- US20190279704A1 PSEUDO-NON-VOLATILE MEMORY CELLS Public/Granted day:2019-09-12
Information query