The display device includes a pixel circuit including a driving transistor, an N-type transistor on a first path coupled from a data line to a gate electrode of the driving transistor, and a P-type transistor on the first path, a first scan driver to supply a first scan signal to the N-type transistor, and a second scan driver to supply a second scan signal to the P-type transistor, wherein a width of a high level section of the first scan signal is wider than that of a low level section of the second scan signal, and the low level section of the second scan signal overlaps with the high level section of the first scan signal.